Assignors: KOUNAVIS, MICHAEL E., BERRY, FRANK, KING, STEVEN R. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Priority to US11/316,772 priority Critical patent/US7958436B2/en Application filed by Intel Corp filed Critical Intel Corp Priority to DE112006003298.4T priority patent/DE112006003298B4/en Priority to CN201210041335.9A priority patent/CN102708022B/en Priority to CN2006800422420A priority patent/CN101305349B/en Priority to JP2008547301A priority patent/JP5269610B2/en Priority to PCT/US2006/047234 priority patent/WO2007078672A2/en Priority to TW095146431A priority patent/TWI360047B/en Assigned to INTEL CORPORATION reassignment INTEL CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Original Assignee Intel Corp Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) Kounavis Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Active, expires Application number US11/316,772 Other versions US20070150795A1 Google Patents Performing a cyclic redundancy checksum operation responsive to a user-level instructionÄownload PDF Info Publication number US7958436B2 US7958436B2 US11/316,772 US31677205A US7958436B2 US 7958436 B2 US7958436 B2 US 7958436B2 US 31677205 A US31677205 A US 31677205A US 7958436 B2 US7958436 B2 US 7958436B2 Authority US United States Prior art keywords data processor register crc perform Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. ![]() Google Patents US7958436B2 - Performing a cyclic redundancy checksum operation responsive to a user-level instruction US7958436B2 - Performing a cyclic redundancy checksum operation responsive to a user-level instruction
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